Physical Design

GLS Physical Design course designed and delivered by working professionals from Semi-Conductor Industry, and as per its current trending requirements will help you get hands-on experience on the physical design flow, using industry-standard EDA tools. This course shall ready you to execute block-level physical design work for which industry is looking. Special emphasize on Fundamentals, Application of Concepts and On the job training, with a minimum of 50 – 60 % time for lab sessions using EDA tools, for example, Synopsys, etc.,

Weekend Batch ( Weekend)

Duration : 3 Months
Days : Saturday & Sunday
Timings : From 10 AM to 4 PM

PG Diploma VLSI Courses Batch (Weekdays)

Duration : 5 Months
Days : Monday to Friday
Timings : From 10 AM to 4 PM

Crash Course Batch (Placement Guaranteed Weekday)

Duration : 2 Months
Days : Monday to Friday
Timings : From 10 AM to 4 PM

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Course Details

Duration:
Weekend: 12 weeks
Full Time: 6 Months Course + 6 Months Paid Internship

Training Delivery Model:

• Interactive Live Online Sessions.
• Lab access through VPN.

Certification:

GLS Certified PD Professional Course completion certificate to be awarded to all participants who successfully complete our tests and evaluation process.

Who can benefit from this Course:

• M.Tech / B.Tech Students.
• Working Professionals from VLSI industry, currently working in other areas such as RTL Design, FPGA Design, Synthesis, STA, board-level testing, etc., and aspire to change to Design Verification career
• Faculties from Engineering Colleges across India.
• Professionals from Electrical and electronics engineering background with good academic Percentage but are working in other industries, and who are desiring to make a career in VLSI verification.
• Working professionals from Embedded background working in PCB designing, assembling, DSP, testing, RFIDs, etc.,

Pre-requisites:

● Working knowledge of Linux.
● Knowledge of Digital Electronics fundamentals.
● Knowledge of Verilog and the ability to design circuits using Verilog.
● Knowledge of CMOS Fundamentals and ASIC / SOC flow is an added advantage to understand the concepts.